1. Field of the Invention
The present invention relates to semiconductor devices.
2. Description of the Related Art
The more a memory device is increased in capacity, the higher the probability of existence of defective memory cells becomes. For this reason, in some cases, a redundant memory is provided in a large-capacity memory device so that defective memory cells are replaced with memory cells in the redundant memory (redundant memory cells). Specifically, there is a method for disconnecting defective memory cells from peripheral circuits with the use of a laser and connecting normal memory cells in a redundant memory to the peripheral circuits with the use of a laser in pre-shipment inspection.
Further, as for defective memory cells which are not inspected in pre-shipment inspection and generated after shipment, a circuit which automatically replaces the defective memory cells with redundant memory cells without the use of a laser (hereinafter referred to as a redundant circuit) is provided. Thus, the life of products is prolonged and the reliability is improved in some cases (see Patent Document 1).
In the case where a redundant circuit is provided, the function of the redundant circuit needs to be inspected before shipment. For that purpose, defective memory cells need to be intentionally manufactured by making normal memory cells incapable of being written, for example. As an example of the method, a first method for disconnecting a wiring connected to a memory cell with the use of a laser and a second method for probing a wiring connected to a memory cell and supplying a fixed voltage can be given.
An example of the first method is described with reference to FIG. 2A showing an example of an anti-fuse memory device. A memory cell shown in FIG. 2A fundamentally has a normal function. The memory cell is temporarily or permanently made incapable of being written.
In the memory cell shown in FIG. 2A, a bit line 101 is connected to one of a source and a drain of an n-channel select transistor 104 through a wiring 102; a word line 103 is connected to a gate of the select transistor 104; one end of an anti-fuse element 105 is connected to the other of the source and the drain of the select transistor 104, and the other end of the anti-fuse element 105 is grounded.
At the time of inspecting the function of a redundant circuit, the wiring 102 is disconnected with a laser. Thus, even when a writing voltage is applied to the bit line 101, the writing voltage is not applied to the anti-fuse element 105, resulting in a failure of the writing.
When the redundant circuit functions normally, the failure of writing data to the memory cell is detected, the memory cell is replaced with a redundant memory cell, and data is written to the redundant memory cell. Normal data can be read from the redundant memory cell.
When the redundant circuit does not function normally and there is a failure of data writing, the memory cell is not replaced with the redundant memory cell and data is written to nowhere as a result. Consequently, normal data cannot be read. In such a manner, whether the redundant circuit functions normally or not can be judged.
An example of the second method is shown in FIG. 2B. A memory cell shown in FIG. 2B has the same configuration as the memory cell shown in FIG. 2A. Note that at the time of inspecting the function of a redundant circuit, one end of a prober 106 the other end of which is grounded is placed in contact with the word line 103. Thus, a ground potential is applied to the gate of the select transistor 104, so that the select transistor 104 is not turned on. Thus, even when a writing voltage is applied to the bit line 101, the writing voltage is not applied to the anti-fuse element 105, resulting in a failure of the writing.
A memory cell incapable of being written is intentionally manufactured and data is written and read as described above; thus, whether a redundant circuit functions normally or not can be judged.